Conference Talk at SIGMOD'20

Education

• ETH Zürich, Switzerland

  2018 – 2023

  Doctor of Sciences

  Computer Science

  Advanced Systems Lab; Learning to Teach; Data Modelling and Databases; Hardware Architectures for Machine Learning; Writing for Publication in Computer Science.

• Paris-Saclay University, France

  2015 – 2018

  Master of Engineering

  Electrical and Electronic Engineering

  Real-time computing; FPGA design; DSP design; .Net C# Framework; Graphical acceleration techniques; Android embedded applications; Distributed applications; Parallelism and video; Financial markets; Corporate social responsibility.

• Paris-Saclay University, France

  2017 – 2018

  Master of Science

  Embedded Systems and Information Processing

  Advanced Architecture; Safety & Security of Real-time Systems; Embedded Processors & Specialised Architectures; Instrumenting & Interfacing of Embedded Systems; Parallel Architecture & Programming; Robotic Vision; Vocal Recognition & Interaction.

• University College London, England

  2016 – 2017

  3rd year Affiliate

  Electronic and Electrical Engineering

  Electronic Circuits III; Advanced Digital Design; Image Processing; Programming and Control Systems; Control Systems II; Digital Signal Processing and Systems; English Language Skill for Academic Purposes; Management Accounting for Decision Makers.

• Paris-Sud University, France

  2014 – 2015

  Bachelor of Science

  Electrical Engineering

  Energy Conversion; Signals, Systems and Automation; C Programming; Probabilities; Digital Electronics; Analogical Electronics; Experimental Physics; Physics and Materials for Information and Energy; History of Electricity and Electromagnetism; French; English; Italian; Entrepreneurship Knowledge.

• Pontifical Catholic University RS, Brazil

  2011 – 2014

  Bachelor of Engineering

  Computer Engineering [not completed]

  Algorithms and Data Structures I and II; Circuit Analysis I; Computational Methods; Computer Architecture I and II; Computer Logic; Computer Organisation [Lecture and Practical]; Differential Calculation and Integrals I to IV; Differential Equations and Integral Transformations; Digital Circuits; Discrete Mathematics; Electromagnetism; Fundamental Mechanics; General Chemistry; Matrix Algebra; Operational Systems; Probability and Statistics; Programming I and II; Signals and Systems; Software Engineering; Technical Drawing; Theory of Computability; Thermology and Fluids; Waves and Modern Physics.

Experience

• Zürich, Switzerland

  Oct'18 – '23

  ETH Zürich

  PhD Researcher

  Developed specialised hardware architectures for efficient data processing engines within distributed system in the cloud. Conducted close collaboration with industry partners, SAP and Amadeus, each resulting on a Best Paper Award in top-tier conferences.

• Cambridge, England

  Mar - Jun'21

  Microsoft

  PhD Visiting Engineer

  Design and implementation of a soft-core architecture for query filtering and aggregation within a key-value store hardware engine deployed on Azure cloud infrastructure. [Project]

  system verilog, fpga, azure, key-value store, hardware data processing

• Palaiseau, France

  Mar – Sep'18

  CEA Saclay

  Research Engineer, Intern

  Study, optimisation and implementation of the memory organisation on a hardware architecture of a scalar and low energy consumption neural network accelerator. [Seminar]

  VHDL, FPGA, ASIC, Testbench, AMBA AXI4, memory hierarchy, artificial intelligence

• Lisbon, Portugal

  Jun – Sep'17

  INESC-ID

  Research Engineer, Intern

  Exploitation of Data-Flow Parallelism and Stream Processing Paradigms within Reconfigurable Processor Architectures. [Paper] [Slides]

  CPU Architecture, VHDL, Simulation, Testbench, Xilinx Virtex7, risc-v, MicroBlaze, mb-lite

• Porto Alegre, Brazil

  May – Dec'12

  Hewlett-Packard

  Software Developer, Intern

  Investigated and validated prototypes of cutting edge technologies on cloud computing and mobile applications.

  Bluetooth, NFC, Wifi Direct, UPnP, C++, C#, Java, Android, HCI, Quality reporter

Service and Events

• EuroSys 2021

  Mar '21

  Systems Research Artifacts

  Artifact Evaluation Committee

• Boston, United States

  Oct '16 – '20

  iGEM Foundation

  Judge

  Judged 51 teams and 31 finalist nominees at '16-'20 Giant Jamborees on Measurement, Diagnostics, Environment, High School, Hardware, Energy and Software tracks.

  Video & Remote Technology Committee

  Porting a 6k-attendant conference to an online platform.

Teaching Assistant

• ETH Zürich

  Spring '23

  Data Modelling and Databases

• ETH Zürich

  Autumn '22

  Big Data

• ETH Zürich

  Spring '22

  Data Modelling and Databases

• ETH Zürich

  Autumn '21

  Data Management Systems

• ETH Zürich

  Autumn '20

  Data Management Systems

• ETH Zürich

  Spring '20

  Informatik

• ETH Zürich

  Autumn '19

  Hardware Acceleration for Data Processing

Invited Talks

• Jul '23

  Specialised Hardware Architectures for Data Engines

  TU Berlin, Germany

• Jun '23

  Leveraging Accelerators for Efficient Cloud Computing: A Holistic Approach

  Microsoft, Redmond, United States

• Nov '19

  An NFA-Based Approach for Accelerating Business Rule Inference on Reconfigurable Hardware

  Amadeus, Sophia Antipolis, France

Honours & Awards

• Seattle, United States

  Jun 2023

  Best Paper Award

  19th International Workshop on Data Management on New Hardware (DaMoN)

• Sydney, Australia

  Aug 2022

  Best Industry Paper Award

  48th International Conference on Very Large Databases (VLDB)

• Orsay, France

  Dec 2014

  Student Award

  Public recognition by the French government

• Boston, United States

  Sep 2014

  Gold Medal

  iGEM Competition, Paris-Saclay team

• Porto Alegre, Brazil

  Jun 2011

  Best Project

  Microsoft, Dell - Student to Business, System Development track

Publications

• ETHZ'23

  2023

  Leveraging Accelerators for Efficient Cloud Computing: A Holistic Approach

  Fabio Maschi

  Doctoral Thesis

  [Publication] [Dissertation]

• TRETS'23

  Strega: An HTTP Server for FPGAs

  Fabio Maschi, Gustavo Alonso

  In Transactions on Reconfigurable Technology and Systems, Vol. 17, Iss. 1, No. 3

  [Publication] [Paper] [Code] [Citation]

• DAMON'23

  The Difficult Balance Between Modern Hardware and Conventional CPUs | 🏆 Best Paper Award

  Fabio Maschi, Gustavo Alonso

  In 19th International Workshop on Data Management on New Hardware (DaMoN '23), June 19, 2023, Seattle, WA, USA.

  [Publication] [Paper] [Citation]

• VLDB'22

  2022

  Hardware Acceleration of Compression and Encryption in SAP HANA | 🏆 Best Industry Paper Award

  Monica Chiosa∗, Fabio Maschi∗, Ingo Müller, Gustavo Alonso, Norman May

  In Proceedings of the VLDB Endowment, Vol. 15, No. 12, 2022, Sydney, Australia.

  [Publication] [Paper] [Video] [Code] [Citation]

• AMADEUS'21

  2021

  From Research to Proof-of-Concept: Analysis of a Deployment of FPGAs on a Commercial Search Engine

  Fabio Maschi, Gustavo Alonso, Anthony Hock-Koon, Nicolas Bondoux, Teddy Roy, Mourad Boudia, and Matteo Casalino

  Amadeus White Paper, 2021, Sophia Antipolis, France.

  [Publication] [Paper] [Citation]

• SIGMOD'20

  2020

  Making Search Engines Faster by Lowering the Cost of Querying Business Rules Through FPGAs

  Fabio Maschi, Muhsen Owaida, Gustavo Alonso, Matteo Casalino, and Anthony Hock-Koon

  In Proceedings of the 2020 International Conference on Management of Data (SIGMOD '20), June 14–19, 2020, Portland, OR, USA.

  [Publication] [Paper] [Slides] [Video] [Code] [Citation]

Demos and Extended Abstracts

• SESAME'23

  2023

  Serverless FPGA: Work-In-Progress

  Fabio Maschi, Dario Korolija, Gustavo Alonso

  In 1st Workshop on Serverless Systems, Applications and Methodologies (SESAME '23'), May 8, 2023, Rome, Italy.

  [Publication] [Paper] [Citation]

• EUROSYS'23

  FPGA as a RESTful Service: Release Your Accelerator From the PCIe Cage!

  Fabio Maschi, Gustavo Alonso

  At EuroSys, 2023, Rome, Italy.

  [Abstract]